Expand description
Scalar fallback for RISC-V Vector (RVV) targets.
Hardware RVV intrinsics are not yet implemented; all operations
use the portable scalar path from super::mod.rs.
RVV 1.0 provides variable-length SIMD (VLEN = 128–16384 bits).
When Rust stabilises core::arch::riscv64 vector intrinsics,
replace the bodies below with vl-strided vector loops.
Build with: RUSTFLAGS=“-C target-feature=+v” cargo build –target riscv64gc-unknown-linux-gnu
Cross-compile without hardware: cargo install cross cross build –target riscv64gc-unknown-linux-gnu –release
Functions§
- dot_
f64_ ⚠rvv - Safety
- fused_
and_ ⚠popcount_ rvv - Fused AND + popcount (portable fallback).
- fused_
xor_ ⚠popcount_ rvv - Fused XOR + popcount using RVV.
- hamming_
distance_ ⚠rvv - Hamming distance between two packed bitstream slices.
- max_
f64_ ⚠rvv - Safety
- pack_
rvv ⚠ - Pack u8 bit array into u64 words (portable fallback).
- popcount_
rvv ⚠ - Count set bits (portable fallback).
- scale_
f64_ ⚠rvv - Safety
- softmax_
inplace_ ⚠f64_ rvv - In-place softmax (portable fallback for RVV).
- sum_
f64_ ⚠rvv - Safety