Control
Controller workbench
Prototype Petri-net, SNN, PID, MPC, replay, and fault-tolerant control logic before facility-specific integration.
Open-source fusion control and validation infrastructure
Control-first software for auditable fusion simulation.
SCPN Fusion Core connects neuro-symbolic plasma-control logic, native physics kernels, Rust acceleration, proof-oriented safety contracts, notebooks, and fail-closed benchmark gates. It helps teams test control ideas, package validation evidence, and identify the exact reference-solver and hardware work needed before stronger parity claims are made.
Why this is useful now
The repository already exposes the instrumentation needed for a disciplined parity campaign: source provenance, benchmark reports, native operators, blocked rows, tutorials, onboarding paths, and reproducibility commands.
Evidence
Validation packaging
Turn local solver and controller results into reports with provenance, thresholds, checksums, and explicit pass, blocked, or diagnostic status.
Capital
Clear funding targets
Financing maps directly to external solver outputs, public datasets, GPU/cluster evidence, and physical HIL timing hardware.
Six financing lanes
Funding converts the remaining blocked rows into same-case solver-output comparisons, thresholded reports, reproducible commands, and hardware-specific scaling evidence.
| Lane | Ready now | Financing unlocks |
|---|---|---|
| GENE/CGYRO/GS2 nonlinear GK blocked |
Public decks and fail-closed manifest contracts. | Same-deck nonlinear distributions, heat-flux spectra, field-energy histories, zonal-flow metrics, convergence evidence, and production-scale comparisons. |
| Full electromagnetic fidelity blocked |
Compact electromagnetic closure, local Maxwell evolution evidence, and native EM replay thresholds. | Self-consistent 5D kinetic current coupling and external electromagnetic GENE/CGYRO/GS2 parity outputs. |
| Production-scale decomposition blocked |
Radial/toroidal decomposition contracts, local halo-face checks, and distributed-run acceptance schema. | MPI or multi-GPU runtime execution, large-grid wall-time scaling, throughput thresholds, and hardware metadata. |
| DREAM-grade runaway electrons blocked |
DREAM deck generation and native kinetic/source-term budget contracts. | PETSc-backed DREAM execution, compiled interface output, momentum-pitch-radius comparison, and loss/operator thresholds. |
| Aurora/STRAHL-grade impurities partially accepted |
Accepted Aurora reference artefact plus native effective transport/source-sink closure thresholds. | Independent mechanistic Aurora/STRAHL recycling validation beyond effective closure replay. |
| Free-boundary strict parity accepted |
Public FreeGS same-case output, native profile-source comparison, strict thresholds, geometry containment, grid convergence, and coil/vacuum sidecars all pass. | Extend beyond the accepted public FreeGS lane to additional public machines and facility-authorised cases. |
Capital plan
The GPU campaign should be staged. More compute without same-case external outputs only improves native benchmarks; financing must cover reference-code execution, artefact curation, and independent reproducibility.
Phase A
USD 250k-500k. Convert remaining public outputs where redistributable, build reference execution scripts, and run smoke-scale GPU/CPU parity checks.
Phase B
USD 2M-5M. Produce credible same-case nonlinear GK, DREAM, Aurora/STRAHL, and FreeGS comparison bundles with tracked reports.
Phase C
USD 10M-25M. Add production-scale cluster and GPU scaling evidence, independent reproduction, and publication-grade convergence studies.
Phase D
USD 50M+. Sustain an external validation programme with larger machines, multi-site hardware evidence, and long-run controls integration.
Hardware evidence fund
The next credibility jump is physical timing evidence: external witnesses, real loopback I/O, and a dedicated compute path. This funds evidence hardware, not reactor hardware.
Turn simulated HIL into measured loopback evidence.
Today the public report separates simulated host ADC/DAC timing from plant hardware claims. The hardware fund buys the instruments needed to replace that row with physical loopback p50/p95/p99 timing, firmware metadata, trace checksums, and external timing-witness captures.
First useful tranche
USD 5k-7.5k
Minimal physical HIL bench
Logic analyzer, FPGA-capable signal I/O, cabling, isolation, and clean bench power for the first real loopback report.
Strong bench HIL evidence
Add mixed-signal instrumentation and a proper multifunction DAQ path for stronger ADC/DAC and digital-I/O evidence.
Dedicated CUDA workstation
Move GPU evidence away from the aging local card and onto a reproducible Linux workstation with modern CUDA capacity.
Professional real-time target
Only after the bench loopback is clean: OPAL-RT, Speedgoat, NI real-time, or similar configured HIL systems.
Hardware sponsorship is evidence-bound: it supports physical loopback timing, isolated benchmark metadata, and reproducible reports. It does not imply plant CODAC, actuator hardware, plasma operation, or certified fault tolerance.
Audit trail
Investors and technical reviewers can inspect the exact public evidence rather than relying on a slide deck.
The ask is specific.
Finance a transparent full-fidelity campaign: same-deck external solver outputs, native same-case comparisons, physical loopback HIL timing, thresholded reports, reproducible artefacts, GPU/cluster scaling evidence, and independent review. The goal is not to hide blockers. The goal is to burn them down in public, one gate at a time.
Contact protoscience@anulum.li