Skip to main content

Module ir

Module ir 

Source
Expand description

§SC Compute Graph IR

A Rust-native intermediate representation for stochastic computing pipelines. The IR captures the semantics of the planned MLIR “sc” dialect (Blueprint §5) and can be lowered directly to synthesizable SystemVerilog or exported as a text format for future MLIR/CIRCT integration.

§Design Principles

  • SSA: Every operation produces exactly one named value.
  • Typed: All values carry an ScType for static verification.
  • Acyclic: The operation list forms a DAG (verified by verify()).
  • Portable: No external dependencies; pure Rust enums and structs.

Modules§

builder
Fluent builder for ScGraph.
emit_mlir
MLIR CIRCT emitter for SC IR graphs.
emit_sv
SystemVerilog emitter for SC IR graphs.
graph
SC Compute Graph data structures.
parser
Text-format parser for SC IR graphs.
printer
Text-format printer for SC IR graphs.
verify
Graph verification passes.